There is an ever increasing demand for power conversion and regulation circuitry to operate with increased efficiency and reduced power to accommodate the continuous reduction in size of electronic portable devices. Many times these devices are battery powered, and it is desirable to utilize as little power as possible to operate these devices so that the battery life is extended. Voltage regulators have been implemented as an efficient mechanism for providing a regulated output in power supplies. One such type of regulator is known as a switching regulator or switching power supply, which controls the flow of power to a load by controlling the on and off duty-cycle of one or more high-side switches coupled to the load. Many different classes of switching regulators exist today.
One type of switching regulator is known as a synchronous switching regulator. In a synchronous switching regulator, an inductor is used to maintain current flow that is switched from two separate sources. The two sources can include a high-side switch, such as a high-side field-effect transistor (FET), and a low-side switch, such as a low-side FET and a freewheeling diode. Once the high-side FET is turned off, magnetic power stored in the inductor dissipates to force current through the inductor by changing the voltage of the inductor source node to negative relative to ground. The freewheeling diode thus conducts current from ground to the inductor after the high-side has been turned off and before the low-side FET has been turned on.
In a continuous conduction mode, current continuously flows through the inductor in the times between activation of the high-side and the low-side switches. In a discontinuous conduction mode, current flow through the inductor is reduced to zero prior to activation of the high-side switch, such as can result from a lower frequency of switching and/or inductor size in relation to the load current. Ripple mode power regulation typically demonstrates great potential in terms of transient performance. However, a ripple mode switching regulator can be subject to deleterious jitter effects.
FIG. 1 illustrates an example of a timing diagram 10 associated with a switching regulator system. The timing diagram 10 demonstrates an output voltage, demonstrated as the signal VOUT. The timing diagram 10 also demonstrates a high-side switch signal and a low-side switch signal which can be driver signals for activation of the respective high-side and low-side switches. In the example of FIG. 1, upon the high-side switch signal being asserted (i.e., logic 1), the high-side switch is activated and the output voltage VOUT increases during an on-time. Upon the high-side switch signal being de-asserted (i.e., logic 0) and the low-side switch signal being asserted, the high-side switch is deactivated and the low-side switch is activated. Thus, the output voltage VOUT decreases during an off-time.
In a typical switching regulator, the relative timing between an on-time and an off-time can depend on a comparison of the output signal with a reference voltage, demonstrated in the example of FIG. 1 as VREF. Accordingly, upon the output voltage VOUT becoming less than the reference voltage VREF, the switching regulator can switch the logic states of the high-side switch signal and the low-side switch signal, thus deactivating the low-side switch and reactivating the high-side switch to begin another on-time. The switching operation can thus be repeated to provide a consistent output voltage at the output of the switching regulator.
Due to noise and/or other effects, the reference voltage VREF and/or the output voltage VOUT can be subject to error. In the example of FIG. 1, the error is depicted as an error voltage VE. The error voltage VE can be undesirably included in the reference voltage VREF, such that a given switching regulator compares the output voltage VOUT with a reference voltage VREF′ that includes the added error voltage VE to determine the relative on-time and off-time. Therefore, the timing associated with the relative on-time and off-time can be uncertain, demonstrated in the example of FIG. 1 as the uncertainty time TUNC. This uncertainty in switching is known as jitter, such that the jitter can undesirably affect the performance of the switching regulator to provide an output voltage.
Specifically, as the output voltage VOUT decreases during the off-time, the output voltage VOUT becomes less than the reference voltage VREF′ at a time sooner than it would become less than the reference voltage VREF. The difference in time between the output voltage VOUT becoming less than the error voltage VREF′ relative to the time that the output voltage VOUT would become less than the reference voltage VREF is the uncertainty time TUNC. Accordingly, the high-side switch signal and the low-side switch signal change states sooner than normal by the uncertainty time TUNC. Therefore, a dashed output 12 is demonstrated as the next on-time and off-time cycle occurring at a time sooner than normal by the time uncertainty time TUNC.
It is to be understood that, although demonstrated as having a magnitude greater than the reference voltage VREF, the reference voltage VREF′ could instead have a magnitude that is less than the reference voltage VREF, such as resulting from a negative error voltage VE. As such, the uncertainty time TUNC could result in the proceeding output 12 occurring later than it should. In addition, the error voltage VE is demonstrated in the example of FIG. 1 as having a substantially constant amplitude for simplicity. It is to be understood, however, that the error voltage VE can have significant variations in amplitude in actuality. Regardless, introduction of the error voltage VE to the reference voltage VREF can result in jitter effects manifested by late or early switching, as demonstrated by the uncertainty time TUNC. Accordingly, the jitter effects caused by an error in the relative magnitude of the reference voltage VREF and the output voltage VOUT can render a ripple mode switching regulator less efficient.